User:JebStuartEldridge/sandbox

AMD EPYC "Rome"

General information
Launched	TBA
Marketed by	AMD
Designed by	AMD
Common manufacturer(s)	TSMC
Architecture and classification
Technology node	7 nm
Microarchitecture	Zen 2 (microarchitecture)
Instruction set	AMD64/x86-64, MMX(+), SSE1, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AES, CLMUL, AVX, AVX2, FMA3, CVT16/F16C, ABM, BMI1, BMI2, SHA
Physical specifications
Cores	≤ 64 cores/128 threads (128 cores/256 threads on dual socket systems)
Products, models, variants
Brand name(s)	EPYC "Rome"
History
Predecessor(s)	EPYC