JFET

The junction gate field-effect transistor (JFET or JUGFET) is the simplest type of field-effect transistor. They are three-lead semiconductive devices that can be used as electronically-controlled switches, amplifier controls, or as a voltage-controlled resistance. Unlike bipolar transistors, JFETs are exclusively voltage-controlled in that they do not need a biasing current. Electric charge flows through a semiconducting channel between "source" and "drain" terminals. By applying a reverse bias voltage to a "gate" terminal, the channel is "pinched", so that the electric current is impeded or switched off completely. A JFET is usually on when there is no potential difference across its gate and source leads. On the contrary, if a potential difference occurs across its gate and source leads, the JFET will be more resistive to current flow, which means less current would flow along the drain-source leads. Thus, JFETs are sometimes referred to as depletion devices. JFETs can have an n-channel or p-channel configuration. In the n-channel configuration, if the voltage applied to its gate is less than that applied to its source lead, a JFET will have a lower current flow from its drain to source lead. In the p-channel configuration, if the voltage applied to its gate is greater than that applied to its source lead, a JFET will have a lower current flow from its drain to source lead. A JFET has a very large input impedance of roughly 10¹⁰ ohms (Ω), which means that it has a negligible effect on external components or circuits connected to its gate since large impedance implies that it has a low input current. JFETs are suitable for simple two-terminal current sources, electronic gain-control logic switches, oscillator circuits, audio mixing circuits, amplifier circuits, bidirectional analog switching circuits, etc.

Structure

Electric current from source to drain in a p-channel JFET is restricted when a voltage is applied to the gate.

The JFET is a long channel of semiconductor material, doped to contain an abundance of positive charge carriers or holes (p-type), or of negative carriers or electrons (n-type). Ohmic contacts at each end form the source (S) and drain (D). A pn-junction is formed on one or both sides of the channel, or surrounding it, using a region with doping opposite to that of the channel, and biased using an ohmic gate contact (G).

Function

I–V characteristics and output plot of a JFET n-channel transistor.

JFET operation is like that of a garden hose. The flow of water through a hose can be controlled by squeezing it to reduce the cross section; the flow of electric charge through a JFET is controlled by constricting the current-carrying channel. The current also depends on the electric field between source and drain (analogous to the difference in pressure on either end of the hose).

Construction of the conducting channel is accomplished using the field effect: a voltage between the gate and source is applied to reverse bias the gate-source pn-junction, thereby widening the depletion layer of this junction (see top figure), encroaching upon the conducting channel and restricting its cross-sectional area. The depletion layer is so-called because it is depleted of mobile carriers and so is electrically non-conducting for practical purposes.

When the depletion layer spans the width of the conduction channel, "pinch-off" is achieved and drain to source conduction stops. Pinch-off occurs at a particular reverse bias (V_GS) of the gate-source junction. The pinch-off voltage (V_p) varies considerably, even among devices of the same type. For example, V_GS(off) for the Temic J202 device varies from -0.8V to -4V. Typical values vary from -0.3V to -10V.

To switch off an n-channel device requires a negative gate-source voltage (V_GS). Conversely, to switch off a p-channel device requires positive V_GS.

In normal operation, the electric field developed by the gate blocks source-drain conduction to some extent.

Some JFET devices are symmetrical with respect to the source and drain.

Schematic symbols

Circuit symbol for an n-Channel JFET

Circuit symbol for a p-Channel JFET

The JFET gate is sometimes drawn in the middle of the channel (instead of at the drain or source electrode as in these examples). This symmetry suggests that "drain" and "source" are interchangeable, so the symbol should be used only for those JFETs where they are indeed interchangeable.

Officially, the style of the symbol should show the component inside a circle (representing the envelope of a discrete device). This is true in both the US and Europe. The symbol is usually drawn without the circle when drawing schematics of integrated circuits. More recently, the symbol is often drawn without its circle even for discrete devices.

In every case the arrow head shows the polarity of the P-N junction formed between the channel and gate. As with an ordinary diode, the arrow points from P to N, the direction of conventional current when forward-biased. An English mnemonic is that the arrow of an N-channel device "points in".

Comparison with other transistors

At room temperature, JFET gate current (the reverse leakage of the gate-to-channel junction) is comparable to that of a MOSFET (which has insulating oxide between gate and channel), but much less than the base current of a bipolar junction transistor. The JFET has higher transconductance than the MOSFET, as well as lower flicker noise, and is therefore used in some low-noise, high input-impedance op-amps.

History of the JFET

The JFET was predicted by Julius Lilienfeld in 1925 and by the mid-1930s its theory of operation was sufficiently well known to justify a patent. However, it was not possible for many years to make doped crystals with enough precision to show the effect. In 1947, researchers John Bardeen, Walter Houser Brattain, and William Shockley were trying to make a JFET when they discovered the point-contact transistor. The first practical JFETs were made many years later, in spite of their conception long before the junction transistor. To some extent it can be treated as a hybrid of a MOSFET (metal–oxide–semiconductor field-effect transistor) and a BJT though an IGBT resembles more of the hybrid features.

Mathematical model

The current in N-JFET due to a small voltage V_DS is given by:

$I_{DSS}=(2a){\frac {W}{L}}qN_{d}\mu _{n}V_{DS}$

where

• I_DSS = drain-source saturation current
• 2a = channel thickness
• W = width
• L = length
• q = electronic charge = 1.6 x 10^-19 C
• μ_n = electron mobility
• N_d = n type doping concentration

The drain-source resistance can be expressed as:

$R_{DS}={\frac {V_{DS}}{i_{D}}}\approx {\frac {V_{GS,off}}{{2}{I_{DSS}}\left({V_{GS}-V_{GS,off}}\right)}}={\frac {1}{g_{m}}}$

The drain-source voltage can be expressed as:

$V_{DS}=V_{D}-V_{S}$

The transconductance of a JFET can be expressed as:

${g_{m}}=\left.{\frac {\partial I_{D}}{\partial V_{GS}}}\right|_{V_{DS}}={\frac {1}{R_{DS}}}={g_{{m}_{0}}}\left({1}-{\frac {V_{GS}}{V_{GS,off}}}\right)={g_{{m}_{0}}}{\sqrt {\frac {I_{D}}{I_{DSS}}}}$

The transconductance of a JFET for shorted gate can be expressed as:

${g_{{m}_{0}}}=-{\frac {{2}{I_{DSS}}}{V_{GS,off}}}$

In the saturation region:

$I_{DS}=I_{DSS}\left[1-{\frac {V_{GS}}{V_{P}}}\right]^{2}$

In the saturation region, JFET is most significantly affected by the gate-source voltage and barely affected by the drain-source voltage.

In the linear region:

$I_{D}=(2a){\frac {W}{L}}qN_{d}{{\mu }_{n}}\left[1-{\sqrt {\frac {V_{GS}}{V_{P}}}}\right]V_{DS}$

or (in terms of $I_{DSS}$):

$I_{D}={\frac {2I_{DSS}}{V_{P}^{2}}}(V_{GS}-V_{P}-{\frac {V_{DS}}{2}})V_{DS}$

In the ohmic region:

$I_{D}=I_{DSS}\left[{2}\left(1-\left({\frac {V_{GS}}{V_{GS,off}}}\right)\left({\frac {V_{DS}}{-V_{GS,off}}}\right)\right)-\left({\frac {V_{DS}}{V_{GS,off}}}\right)^{2}\right]$

In the ohmic region, JFET behaves similar to a variable resistor.

where ${V_{P}}$ is the pinch off voltage, which is the minimum voltage across G-S that is necessary to completely turn off conduction. Cutoff Voltage (${V_{GS,off}}$) is the gate-source voltage where JFET behaves similar to an open circuit, i.e. channel resistance is at its maximum. Breakdown voltage (${{BV}_{DS}}$) is the voltage across the drain and source that is necessary to get current across the JFET's resistive channel. The drain-current for zero bias (${I_{DSS}}$) is the drain current when gate-source voltage is 0 V. Transconductance (${g_{m}}$) is the rate of change in the drain current with the gate-source voltage when the drain-to-source voltage is fixed for a specific ${V_{DS}}$.

When $V_{DS}$ is small in comparison to $V_{GS}$ minus $V_{P}$, the device acts like a voltage controlled resistor. A n-channel JFET's ${V_{GS,off}}$ is negative. A p-channel JFET's ${V_{GS,off}}$ is positive. ${V_{GS,off}}$ and ${I_{DSS}}$ are usually given in a data table or on the package. ${I_{DSS}}$ has typical JFET values between 1 mA to 1 A. ${V_{GS,off}}$ has typical JFET values for n-channel between -0.5 to -10 V. ${V_{GS,off}}$ has typical JFET values for p-channel between 0.5 to 10 V. ${R_{DS,on}}$ has typical JFET values between 10 and 1000 Ω. ${{BV}_{DS}}$ has typical JFET values between 6 and 50 V. ${g_{m}}$ has typical JFET values at 1 mA between 500 and 3000 µmho.

See also

• Constant-current diode

External links

• Physics 111 Laboratory -- JFET Circuits I pdf
• Interactive Explanation of n-channel JFET